Crawford did not disclose specific plans for such a processor, though he said Intel will be able to design and build a 1-billion-transistor microprocessor using 65-nanometer process technology by 2007.

Crawford went on to describe a hypothetical processor that would contain four Itanium 2 cores and 12 to 16 megabytes of shared cache memory, all connected through a leaf interconnect scheme. Each Itanium 2 processor would contain about 120 million transistors while the cache would carry 700 million to 950 million transistors, bringing the total transistor budget to well over 1 billion, he said.