Posters Name: Kagato
Posters Email: kagato@mwgl.org
Subject: 4 Core Itanium 2 CPU From Intel?
News:
Here's a new toy for SMP fans. In a keynote address at the Microprocessor Forum in San Jose, Intel's John Crawford described how they could combine four Itanium 2 cores that share a large cache memory to create a processor with more than 1 billion transistors. He went on to note that such a design is "imminently doable" from a die-size and manufacturing standpoint and that "we would expect something of this nature coming out."
Crawford did not disclose specific plans for such a processor, though he said Intel will be able to design and build a 1-billion-transistor microprocessor using 65-nanometer process technology by 2007.Now could you imagine a rig with two of those things in SMP?! Talk about pure, raw, processing power! Course the only thing us gamers would care for is how many FPS we can get.
Crawford went on to describe a hypothetical processor that would contain four Itanium 2 cores and 12 to 16 megabytes of shared cache memory, all connected through a leaf interconnect scheme. Each Itanium 2 processor would contain about 120 million transistors while the cache would carry 700 million to 950 million transistors, bringing the total transistor budget to well over 1 billion, he said.